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		Breker Verification Systems: EETimes--Predictions for 2012: Industry trends EETimes--Predictions for 2012: Industry trends Carbon: EETimes--Predictions for 2012: IP and Physical Design ChipEstimate.com--Front-end Tools Bolster IP Design Chain EETimes--Predictions for 2012: Industry trends Low-Power Engineering Community--Experts At The Table: Making Software More Energy-Efficient--Part 1 of 3 Electronic Design--Virtual Platforms And TLMs Going Mainstream EETimes--Blog--Prototypes: Pre-RTL or Virtual prototypes EETimes--EDA Designline Blog--Virtual Platforms Become Powerful Analysis Tools Low-Power Engineering Community--Experts At The Table: Multi-Core And Many-Core--Part 3 of 3 Low-Power Engineering Community--Experts At The Table: Multi-Core And Many-Core--Part 2 of 3 Low-Power Engineering Community--Experts At The Table: Multi-Core And Many-Core--Part 1 of 3 EETimes--Products--CEVA and Carbon offer fast simulation models for CEVA DSPs EETimes--News & Analysis--Carbon Adds AMBA MCU analysis SoC Designer Plus EETimes--Products--Carbon Design Systems adds ARM Cortex-A 15 models EETimes--Products--Carbon and MIPS collaborate for virtual platform SemiWiki--Semiconductor Virtual Platform Models EETimes--Products--Carbon, Mentor team for 8051 virtual models distribution EETimes--Product Brief--Carbon TLM-2.0 for AMBA protocol solution EETimes--Commentary--Let go of my Legos EDN--Free models for ARM's AMBA on-chip interconnect EETimes--Design Article--Achieving first day multicore SoC software success EETimes--Carbon posts 35% growth in 2010 Electonic Engineering Journal--Other Peoples Code---You down with OPC? edagraffiti--Carbon Design Systems EETimes--Carbon Adds ARM Models to Carbon IP Exchange Gabe on EDA--Carbon Adds Additional ARM Processor Content to Carbon IP Exchange CEDA: EDACafe--IEEE CEDA Corner--IEEE Names Six Fellows from Within Council on EDA Ranks SemiWiki--Nvidia's Chris Malachowsky on "Watts next" EDACafe--Donatella Sciuto to Become CEDA President SemiWiki--Semiconductor Power Comsumption and Fintertop Computing! Low-Power--"Watts Next?" asks Chris Malachowsky, co-founder, NVIDIA Fellow and Senior VP of Research EDACafe--Now Available: Video of DAC Lunch Presentation on Truths and Myths of Embedded Computing EDACafe--Four Achievement Awards to be Presented During DAC Next Week PCB Design 007--Maxed Out: The "Father of EDA" EETimes--Nominations open for the 2011 EDA Industry's Phil Kaufman Award EETimes--Quaffing a beer with The Father of EDA EDACafe--DAC Lunch Presentation on Truths and Myths of Embedded Computing, Hosted by CEDA EDACafe--Nominations Open for Early Career Award edagraffiti--Pat Pistilli: the first cell library, the first printed label and more Gabe on EDA--Expanding EDA's Business Models EDACafe--Lucio Lanza’s View of the Industry EDN--Kaufman Award winner Pat Pistilli: DAC and the birth of the EDA industry EVE: EETimes--Predictions for 2012: Industry trends EETimes--Predictions for 2012: Industry trends Gabe on EDA--Pondering the Next Big Idea Electronic Design--Social Medial And Streaming Video Give EDA Cause For Optimism Electronic Design--Virtual Platforms And TLMs Going Mainstream Gabe on EDA--Coming Full Circle Gabe on EDA--What Is Up With Social Media? Gabe on EDA--Emulation for the People? Electronic Design--Multicore SoCs Make Emulation Mandatory EETimes--Emulation: EVE makes use of the Xilinx Virtex-6 devices in new emulators Gabe on EDA--Finding Sucess in EDA System-Level Design Community--Experts At The Table: System-Level Verification--Part 3 of 3 Electronic Design--Is An Emulation Hockey Stick Coming? System-Level Design Community--Experts At The Table: System-Level Verification--Part 2 of 3 EETimes--Many-Core: Finding the Best Multi-Processing Tile System-Level Design Community--Experts At The Table: System-Level Verification--Part 1 of 3 EDACafe--Hardware-Assisted Verification and the Animal Kingdom Electronic Engineering Journal--The Fruits of Acquisition Electronic Engineering Journal--An Almost-Cloudy San Diego Day Electronic Design--Get Faster Verification For Less Power Chip Design--some Practical Science; Save a Life EETimes--Emulation: Enabling Hardware/Software Co-Verification EETimes--Hardware-assisted verification platform + Ethernet testing solution EDACafe--Livin' on a Prayer EETimes--EVE's ZeBu integrated with ARM's VSTREAM Virtual Debug Interface Low-Power Engineering Community--Experts At The Table: Verification At 28nm And Beyond--Part 3 of 3 Low-Power Engineering Community--Experts At The Table: Verification At 28nm And Beyond--Part 2 of 3 Low-Power Engineering Community--Experts At The Table: Verification At 28nm And Beyond--Part 1 of 3 EETimes--No longer a startup, EVE aims for top tier EDA Chip Design--Determining the Best Verification Solution for the Task EETimes--Using simulation and emulation together to create complex SoCs EDN--Complete IC simulation requires a full toolbox of hardware and software EDACafe--The Multiple Phases of EVE Chip Design--Read a Blog; Apply some Practical Science; Save a Life Chip Design--Solve the Verification Challenge Electronic Engineering Journal--Using A Hierarchical Approach to Tame SOC Debug Anarchy EDACafe--EDA Innovation Gabe on EDA--EVE Enhances Emulation Platform with New Debugging Capabilities Gabe on EDA--EVE Grows Revenue Over 50%, Sees Double-Digit Profits, Increases Market Share 2010 EDACafe--Satisfaction EDA Style! EETimes--EVE preps defense against Mentor Electronic Design--Master Of Many Trades: Designing An Emulator Calls On Diverse Skills Gabe on EDA--Expect Widespread Adoption of Hardware Emulation in 2011 Business News Daily---50 Big Ideas, Predictions and Trends for 2011 and Beyond EDACafe--Hardware Emulation for Lowering Production Testing Costs Gabe on EDA--EVE Prevails Against Mentor Graphics' Patent Infringement Allegation EETimes--Mentor sues EVE in Toyko, EVE responds EDACafe--Building Relationships Between EDA and Semiconductor Ventures Forte Design Systems: Electronic Design--Virtual Platforms And TLMs Going Mainstream Low-Power Engineering Community--Experts At The Table: Managing Power At Higher Levels Of Abstraction--Part 3 of 3 Low-Power Engineering Community--Experts At The Table: Managing Power At Higher Levels Of Abstraction--Part 2 of 3 Low-Power Engineering Community--Experts At The Table: Managing Power At Higher Levels Of Abstraction--Part 1 of 3 EE dailynews--DAC 2011 previews: Forte Design Systems updates Cynthesizer HLS EETimes--Forte Design Systems ships latest ASIC and FPGA high-level synthesis System-Level Design Community--Experts At The Table: Pain, Abstraction and ESL--Part 2 of 3 EETimes--The future is High-Level Synthesis System-Level Design Community--Experts At The Table: Pain, Abstraction and ESL--Part 1 of 3 Gabe on EDA--2011: The Year of U.S. High-Level Synthesis Deployment Gabe on EDA--Forte Design Systems’ SystemC High-Level Synthesis Selected for Fujitsu Semiconductor’s ASIC Reference Flow Kilopass: EETimes--Predictions for 2012: Industry trends Electronic Engineering Journal--A Design Methodology for Building Process-Independent Hardmarco IP Chip Design--Why Anti-Fuse is The Only Secure Choice for Encryption Key Storage EETimes--UMC, Kilopass extend license agreement Gabe on EDA--Kilopass Verus Sidense Gabe on EDA--Kilopass Expands Non-Volatile Memory Offering Semiconductor Manufacturing & Design Community--Experts At The Table: Multi-Foundry Strategies--Part 3 of 3 Tech Design Forum--Ensuring the reliability of non-volatile memory in SoC designs Semiconductor Manufacturing & Design Community--Experts At The Table: Multi-Foundry Strategies--Part 2 of 3 EE Daily News--Avtivity picks up in non-volatile memory IP Semiconductor Manufacturing & Design Community--Experts At The Table: Multi-Foundry Strategies--Part 1 of 3 EETimes--News & Analysis--SMIC picks Kilopass NVM IP for 55-nm DAC Knowledge Center--Applications Emerging to Employ Embedded Non-Volatile Memeory Electronic Design--Multi-Time Nonvolatile Programable Memory Supports 40nm EETimes--Embedded antifuse NVM: A mission critical IP for display driver ICs EETimes--The first CMOS embedded MTP NVM IP in 40nm -Itera Electronic Engineering Journal--Do It Again Electronic Engineering Journal--FLASH Gets Even Smaller EETimes--Kilopass releases non-volatile memory IP Gabe on EDA--Kilopass Introduces Industry's First Embedded Multi-Time Progammable Non-Volatile Memory in 40nm Logic CMOS EDN--Kilopass develops embedded multi-time progammable non-volatile memory in 40nm logic CMOS SOCcentral--Factors Compelling Greater Use of Embedded One-Time Programmable Memory Chip Design--Define Embedded Memory Electronic Design--Kilopass Delivers OTP And MTP Memory System-Level Design Community--Experts At The Table: IP Business Models--Part 3 of 3 GSA Forum (page 26)--Semiconductor IP Licensing: Prelude to Best Practices EETimes--Virmicro using NVM in PC-camera processors System-Level Design Community--Experts At The Table: IP Business Models--Part 2 of 3 EETimes--STOP! Are you Gambling On Your Memory IP? System-Level Design Community--Experts At The Table: IP Business Models--Part 1 of 3 System-Level Design Community--What's a Cell Phone? Gabe on EDA--The Re-Emergence of Semiconductor IP: An Optimistic View of 2011 EDA360 Insider--Is IP the next Fabless? Kilopass’ Charlie Cheng thinks so. EETimes--Transforming the U.S. semiconductor business model Magma: EETimes--EDA DesignLine Blog--Magma lets analog get physical EETimes--Design Article--Building 3D-ICs: Tool Flow and Design Software Part 2 EETimes--Design Article--Building 3D-ICs: Tool Flow and Design Software Part 1 EDA Confidential--Patrick Groeneveld's Good Cheer Chip Design--Users name the Top 5 EDA Tools Shown at DAC 2011 SemiWiki--Phil Bishop and marketing at Magma EETimes--EDA in the clouds Semiconductor Manufacturing & Design Community--Experts At The Table: Multi-Foundry Strategies Electronic Engineering Journal--3D's Supporting Players Semiconductor Manufacturing & Design Community--Experts At The Table: Multi-Foundry Strategies, Part 2 of 3 EDN--The quandry of EDA software piracy Semiconductor Manufacturing & Design Community--Experts At The Table: Multi-Foundry Strategies, Part 1 of 3 Gabe on EDA--TSMC Qualifies Magma's QCP Extractor for 28-nm Designs System-Level Design Community--Experts At The Table: 2.5D Stacked Die, Part 2 of 3 System-Level Design Community--Experts At The Table: 2.5D Stacked Die, Part 1 of 3 The Motley Fool--Magma Design Automation May Be Warning You. Are You Listening? EETimes--Blog--Viewpoint: EDA vendors must focus on making silicon profitable for their customers EDN--EDA tools pave pathe to 3-D ICs, part 1 SemiWiki--Magma, ARM, GlobalFoundries Gabe on EDA--Magma, Mentor, and Synopsys Financial Reports EETimes--News & Analysis--Mentor, Magma, top expectations Gabe on EDA--EDA News of the Week Recap for April 25-29, 2011 Semiconductor Manufacturing & Design Community--Experts At The Table: Yield Issues--Part 2 of 3 Gabe on EDA--Magma's New Excalibur-Litho Integrates Real-Time Data from Semiconductor Manufacturing Floor with CAD Information EETimes--Products--Magma unveils Excalibur-Litho fab analysis framework Gabe on EDA--Magma's Titan Selected by iWatt to Automate Design of Power Supply Control ICs EETimes--Products--iWatt deploys Magma's Titan to shorten analog design process Semiconductor Manufacturing & Design Community--Experts At The Table: Yield Issues--Part 1 of 3 Low-Power Engineering Community--Experts At The Table: Billion Gate Challenges--Part 3 of 3 Low-Power Engineering Community--Experts At The Table: Billion Gate Challenges--Part 2 of 3 Low-Power Engineering Community--Experts At The Table: Billion Gate Challenges--Part 1 of 3 EDN--Complete IC simulation requires a full toolbox of hardware and software EDN--Superheroes of SOC--Industry Update: Rajeev Madhavan Silicon Valley/San Jose Business Journal--Magma swings to $1M profit in Q3 EDA Confidential--Bob Patti: 3D @ Tezzaron edagraffiti--Magma's new P&R and re-building the foundations Gabe on EDA--Mentor acquires Magma: Not Aanytime Soon Gabe on EDA--Automating the Mixed-Signal Design Flow in 2011 Electronic Design--Chip Layout, Implementation Add Significant Muscle Gabe on EDA--Magma's Revenue for Second Quarter Exceeds Financial Guidance EDN--EDA tool accelerates place and route for SOCs System-Level Design Community--Experts At The Table: The Hidden Costs In Design, Part 3 EETimes--EDA DesignLine Blog--Technology waits for no one and nothing EETimes--EDA DesignLine Blog--From RTL to GDSII in Just Six Weeks Nanette V. Collins: Gabe on EDA--EDA And The Tale Of A Yoga School SKMurphy--Nanette V. Collins: Startup Culture is Critical SKMurphy--Nanette V. Collins On Volunterring: Lessons Learned form the Trenches Oasys Design Systems: EETimes--Predictions for 2012: IP and Physical Design EETimes--Predictions for 2012: Industry trends Chip Design--Users name the Top 5 EDA Tools Shown at DAC 2011 Electronic Engineering Journal--Is That Any of Your Business? GSA Forum--Power: A Business Problem EE dailynews--DAC 2011 preiews: Oasys Design Systems adds DFT to its Chip SynthesisTM platform Chip Design--A Look into the Future of Chip Design SOCcentral--Oasys Design systems Adds DFT Capabilities to Chip Synthesis Low-Power Engineering Community--Experts At The Table: Power Budgeting--Part 1 of 2 Gabe on EDA--Oasys Design Systems Ehances Chip Synthesis with Power Capabilities EETimes--Oasys adds power capabilities to Chip Synthesis platform Gabe on EDA--2011: Chips Not Blocks Sigmatix: EETimes--Vector processing: Finally, high-performance software-defined radio Vennsa Technologies: Chip Design--Users name the Top 5 EDA Tools Shown at DAC 2011 Electronic Engineering Journal--Sorting Through the Rubble Chip Design--Why Did My Design Fail Verification, Dude? Verific Design Automation: EETimes--Predictions for 2012: Industry trends Electronic Design--Missing Your Schedule Can Cost You Plenty--Even Billions Gabe on EDA--Verific Licenses Front-End Software to Veridae Systems for Clarus Family of Debug and Validation Products		Color
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Color	"I have worked with the delightful Nanette Collins for more than six years, spanning three companies. Nanette is the ultimate in a proactive PR professional (sometimes I think that I work for her!). We never worry about anything slipping through the cracks, her follow-up is as complete as it gets." Steve Carlson, Group Director, R & D Cadence Design Systems			Color