nvc.com - releases

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		Carbon: Gabe on EDA--Carbon Unveils New Generation of ARM Models with Availability of Mali Models EDA DesignLine--Carbon readies virtual models for ARM Mali GPUs EDA DesignLine--Mission critical: Oh S&*T! What happened to my brakes? TechBites--Technology Models come together in Virtual Prototypes Gabe on EDA--Carbon Design, VeriSilicon Form IP Partnership EDA DesignLine--Carbon Design, VeriSilicon sign IP pact Gabe on EDA--Strong Demand for Models, Tools Supporting Hardware and Software Groups Gabe on EDA--EDA in 2010 EDA DesignLine--Carbon posts 28% growth in 2009 EDA DesignLine--Carbon enhances ARM IP portfolio EDN--Model-based design and early verification aid design TechBites--Carbon Expands ARM IP Library Gabe on EDA--Carbon Further Expands ARM IP Library Gabe on EDA--Carbon Adds Support for Fast Models from ARM CEDA: EDACafe--Luca Daniel to be Honored with Early Career Award from IEEE CEDA EDACafe--The IEEE Council on Electronic Design Automation's Award Program EDACafe--Hello world! Introducing the IEEE Council on Electronic Design Automation Gabe on EDA--Exploiting Concurrency, the Next Frontier Gabe on EDA--EDA in 2010 EDN--Leibson's Law--Major EDA Users Take the Driver's Seat EDA DesignLine--IEEE's council forms EDA user group Gabe on EDA--EDA User Group Formed under IEEE's Council on EDA JOHN'S SEMI-BLOG--CS Gravitas Gabe on EDA--Kaufman Award Dinner Notes EDN--EDA Graffiti--Kaufman Award Dinner Cadence Industry Insights Blog--Cadence's Andreas Kuehlmann To Head IEEE Council On EDA-- Gabe on EDA--IEEE Council on EDA Elects Officers to Two-Year Term EVE: System-Level Design Community--Experts At The Table: Emulation System-Level Design Community--Experts At The Table: Emulation EDACafe--Hardware-Assisted Verification Usage Survey of DAC Attendees TechBites--Are EVE and Mentor heading to war? Gabe on EDA--Mentor Graphics Files Import Suspension Application Against EVE with Japanese Customs Office System-Level Design Community--Experts At The Table: Emulation Chip Design--Verification Leadership on Display System-Level Design Community--Experts At The Table: EDA Outside The United States Electronic Design--TLM-Based Verification Finds Strength In Standards System-Level Design Community--Experts At The Table: EDA Outside The United States EDACafe--Celebrating Freedom from Verification Gabe on EDA--EVE Achieves Record Bookings of $19.9 Million in Q4 FY2010 System-Level Design Community--Experts At The Table: EDA Outside The United States Embedded Computing Design--Using emulation to verify today’s complex designs Chip Design--EVE: Looking Back on the Path Forward EETimes--EDA DesignLine--EDA DesignLine's "what's new" list at DAC! EDACafe--Will 70 Remain the Verification Number? Gabe on EDA--EVE's ZeBu Emulation System Adopted by STMicroelectronics EETimes--ST uses EVE's ZeBu emulator EETimes--A look back at the last 10 years of chip design TechBites--Is Synopsys getting ready to buy EVE? IC Design and Verification Journal--From Simulation to Emulation: It Takes Three–er–Four to Tangle" Gabe on EDA--EVE Adds Support for TLM-2.0 to ZeBu Hardware-Assisted Verification Platforms EETimes--EVE's ZeBu supports TLM-2.0 Gabe on EDA--Business 101: Sustainable EDA Chip Design--Making Abstraction Practical EDACafe--All About EVE EDN--Save time and money with smart debugging method Electronic Design--A Positive Report from EDSFair EDACafe--Celebrating 10 years of Emulation Leadership Gabe on EDA--Konica Minolta Adopts EVE's ZeBu Emulation Platform EDA DesignLine--Konica Minolta selects EVE's ZeBu System-Level Design Community--Emulation 2010 Chip Design--The Academy Award Goes to ...Verification Engineers of all Stripes EDA DesignLine--ICE debugging: the end of the battleship game EDACafe--Fostering Innovation Chip Design--People in the News: EVE Names Ron Burns Vice President of Sales EDA DesignLine--EVE to Sponsor 5th annual workshop on architectual research prototyping EDA DesignLine--Universities gain access to Agilent, EVE, Altium, Evatronix tools Gabe on EDA--2010: Meeting the Latest Design Challenges Gabe on EDA--EDA in 2010 Chip Design--Billions of Cycles for Billions of Gates TechBites--Experts at the table. Stop the bickering EDA DesignLine--EVE's emulator provides multi-user capability Low-Power Engineering Community--Experts At The Table: Rising Complexity Meets Verification Low-Power Engineering Community--Experts At The Table: Rising Complexity Meets Verification Electronic Design--Spelling Success With A Good University Program EDA DesignLine--EDA leads design team, acceleration market, says Gary Smith EDA TechBites--EVE keeps up the pressure on establishing leadership Cadence Community Design and Verification Blog--We and Our Competitors Agree (Well, Almost!) Gabe on EDA--EVE Offers Green Emulator EDA DesignLine--DAC survey uncovers surprises TechBites--Who is winning the emulation war? EDA DesignLine--EDA industry stunts its own growth EETimes--Design & IP News--EVE ZeBu-Server supports clever debug methodology Gabe on EDA--EVE's ZeBu-Server Supports Smart Debug Methodology Gabe on EDA--EVE, INTERRA, and JASPER in the News Xcell Journal--EVE Taps Xilinx for Multiple Generations of Emulators System-Level Design Community--Experts At The Table: System-Level Verification Chip Design--Max's Chips and Dips: Don't Forget the Little Guys at DAC System-Level Design Community--Experts At The Table: System-Level Verification Forte Design Systems: EDACafe--High Level Synthesis Has Come Of Age EDN--ESL synthesis: tips for implementing a viable ESL-synthesis flow EETimes--Blog: Dispelling the myths of High-Level Synthesis Electronic Design--TLM-Based Verification Finds Strength In Standards EETimes--Transitioning from C/C++ to SystemC in high-level design TechBites--Forte ups the anti with new Cynthesizer Ultra SKMurphy--Interview with John Sanguinetti Gabe on EDA--Forte Unveils Cynthesizer Ultra, Next Generation High-Level Synthesis Gabe on EDA--Business 101: The Serial Entrepreneur TechBites--Forte Design Systems is shipping red-hot version of CellMath Designer EDA DesignLine--High-level synthesis, verification and language Electronic Design--Designing For Low Power? Get Started At System Level System-Level Design Community--Remaking The Design Landscape EDA DesignLine--MegaChips licenses Forte's HLS software Gabe on EDA--EDA in 2010: More Technical Activity Gabe on EDA--EDA in 2010 System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 3 System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 2 Low-Power Engineering Community--Experts At The Table: The Reliability Factor System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 1 EDACafe--Credibility System-Level Design Community--Experts At The Table: ESL Standards System-Level Design Community--The FPGA Alternative IC Design and Verification Journal--Living With Ambiguity: The Other HLS Silicon Valley/San Jose Business Journal--Forte Design Systems Acquires Arithmatica EETimes--Forte acquires IP, datapath synthesis vendor EDA Thoughts--Forte Acquires Arithmatica Gabe on EDA--Forte Design Systems Acquires Arithmatica EDN--Forte's acquisition of Arithmatica could open a new style for datapath design Electronic Design--Tool Up For The FPGA Blitz Low-Power Design Community--Experts At The Table: ESL and Low Power Magma: Gabe on EDA--TSMC Used Magma’s Quartz on 28-nm Product Qualification Vehicle Test Chip EDN--Design quality and its impact on design closure Gabe on EDA--Clash of the Titan IC Design and Verification Journal--Extracting a Life EETimes--Viewpoint: The coming tsunami in the electronics ocean Chip Design--EDA Must Focus on Relentlessly Reducing Design Cost Gabe on EDA--Social Media Fragmentation: The Magma Example Reported by Lou Covey Gabe on EDA--Magma and SynTest Integrate DFT into RTL-to-GDSII Design Flow Gabe on EDA--Magma Design Automation Joins Si2’s OpenPDK Coalition TechBites--Magma Rocks! Gabe on EDA--Magma Reports Revenue of $123.1 million for Fiscal 2010 EETimes--Magma sharply narrows annual loss EDA Confidential--A Conversation: Dr. Mar Hershenson Gabe on EDA--Magma Launches Titan ALX and Titan AVP Gabe on EDA--Magma's Titan Mixed-Signal Platform Supports TSMC's 65 and 40nm iPDKs EDA DesignLine--Magma's Titan supports TSMC's 40nm iPDK Gabe on EDA--Magma's Titan Supports IPL 1.0 Standard for Interoperable Design Kits Gabe on EDA--Magma announces SiliconSmart ACE Memory Characterization EDA DesignLine--Magma expands SiliconSmart IP characterization product range EDA DesignLine--Magma launches education program for analog designers IC Design and Verification Journal--Silicon Lineup--Pattern Matching Helps Identify Silicon Suspects IC Design and Verification Journal--Starting Over--Magma Develops Tekton From a Clean Sheet EDA DesignLine--TMSC licenses Magma's physical verification tools EDACafe--Static Timing Analysis Is Not Staying Static EDN--Practical Chip Design--Magma Tekton: rethinking static timing analysis Gabe on EDA--Magma Unveils Tekton Its Static Timing Analysis Solution EDA DesignLine--Magma readies static timing analysis platform EDN--EDA Graffiti--Tekton EDA DesignLine--Magma releases alternative to Monte Carlo analysis Electronic Design--Oh, The Pain (Of Timing Closure at 28 nm) Gabe on EDA--Jay Vleeschhouwer talks about Cadnece and Magma Gabe on EDA--Magma Reports Revenue for Third Quarter--Exceeds All Financial Guidance System-Level Design Community--The Week In Review: Feb 26 TechBites--Hurray! Magma on a roll--exceeds guidance Barrons--Tech Trader Daily--Magma Design Q3 Beats EETimes--Magma tops sales forecasts, posts loss Silicon Valley/San Jose Business Journal--Magma Design whittles Q3 loss to $2.6M EETimes--Magma provides EDA for Western China EDA DesignLine--What if what-if analysis won't work at 28nm? IC Design and Verification Journal--Bringing Together Two Points of View Gabe on EDA--Big Designs, Big Challenges, Big Opportunities Gabe on EDA--EDA in 2010 System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 3 System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 2 Electronic Design--Verification And Software Dominate EDA's Future Low-Power Engineering Community--Experts At The Table: The Reliability Factor Sramana Mitra--EDA Market Stabilizing? System-Level Design Community--Making DFM Work Better System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 1 EDA DesignLine--The week in review: Dec 4 EETimes--Mentor, Magma beat targets; outlooks disappoint Gabe on EDA--Magma's Revenue for Second Quarter Exceeds Financial Guidance Silicon Valley/San Jose Business Journal--Magma Design swings to $4.3M Q2 profit Gabe on EDA--Magma Announces BoardView EDA DesignLine--Magma extends chip-based navigation to circuit, board-level debug Chip Design--Static Timing Analysis at 28nm: More and Bigger is Not the Answer EDACafe--What is Different at Magma? GSA Forum--Industry Reflections: Rajeev Madhavan EDA DesignLine--The advantages of using massive software parallelism in EDA EDN--EDA Graffiti--Potpourri EETimes--Magma posts loss, amends tender offer Sramana Mitra--EDA Indusrty: Consolidation Remains a Priority System-Level Design Community--The Week In Review: Aug. 28 Nanette V. Collins: SKMurphy--Nanette V. Collins: Startup Culture is Critical SKMurphy--Nanette V. Collins On Volunterring: Lessons Learned form the Trenches Oasys Design Systems: Chip Design--Chip Synthesis Defined EETimes--Interview: Paul van Besouw, Oasys Design Systems Embedded Computing Design--Chip synthesis and high-level synthesis: software in hardware Olivier Coudert's Blog--Who should worry about Xilinx and Oasys partnership? harry ...the ASIC guy--Oasys for FPGA Synthesis? Hmmmm…. Gabe on EDA--Oasys Design Systems’ Announces Multi-Year Chip Synthesis Technology License with Xilinx EETimes--Xilinx licenses synthesis technology from EDA startup Electronic Design--Ode to the Chip Synthesis Hero EDA DesignLine--The documentation challenge EDACafe--Increasing The Level Of Abstraction Of IC Design EDA DesignLine--Is EDA innovating enough? EDN--EDAC's origins System-Level Design Community--Experts At The Table: The State of EDA System-Level Design Community--Experts At The Table: The State of EDA System-Level Design Community--Experts At The Table: The State of EDA EDA DesignLine--Chip synthesis: A new approach to RTL implementation Gabe on EDA--RTL-to-GDSII Needs Massive Re-Tooling EDACafe--An Oasys Grows in the EDA Landscpe System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 3 System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 2 Electronic Design--Verification And Software Dominate EDA's Future System-Level Design Community--Experts At The Table: The Past, Present And Future of Synthesis, Part 1 IC Design and Verification Journal--Synthesizing a New Category: Oasys Turns Synthesis Upside Down EDN--EDA Graffiti--The VHDL and Verilog story TechBites--Chip Synthesis from Oasys Could be MEGA-COOL! Chip Design--C'mon Rock'n'Chip Fans, Join the Chip Synthesis Revolution Sigmatix: Embedded Computing Design--Can Multimode Vector Radio break the SDR performance barrier? EETimes--Multimode vector radio dismantles barriers to SDR software portability EDN--Wireless to go Mobile Handset DesignLine--It's the software stupid! EDN--Guest blog: Phil Moorby Vennsa Technologies: IC Design and Verification Journal--Passing the Test: Vennsa Tries to Figure Out Who Screwed Up EDA DesignLine--Debug will get your attention, sooner or later EDA DesignLine--EDA Designline's "what's new" list at DAC Gabe on EDA--Vennsa Technologies Unveils Onpoint, to Automate Debugging, Error Localization Verific Design Automation: Chip Design--Emulation and RTL Hygiene Gabe on EDA--Parallel Engines Licenses Verific Design Automation Software Gabe on EDA--SystemVerilog Leaps form 2005 to 2009, And Beyond Gabe on EDA--EDA in 2010		Color
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Color	"I have worked with the delightful Nanette Collins for more than six years, spanning three companies. Nanette is the ultimate in a proactive PR professional (sometimes I think that I work for her!). We never worry about anything slipping through the cracks, her follow-up is as complete as it gets." Steve Carlson, Group Director, R & D Cadence Design Systems			Color